Ferromagnetic elements are used, for example, to form non-volatile memory cells. A magnetic element typically includes bottom and top magnetic layers separated by a non-magnetic layer. The non-magnetic layer, for example, comprises an insulating material to form a magnetic tunnel junction (MTJ) type element. First and second conductors are magnetically coupled to the top and bottom magnetic layers to form a magnetic memory cell. One conductor is referred to as the bitline and the other is referred to as the wordline. The bitline and wordline are orthogonal to each other. A plurality of magnetic elements are interconnected by wordlines and bitlines to form an array.
The magnetic layers of an element are formed with magnetic vectors along an easy axis. The magnetic vector of one layer is fixed in a first direction along the easy axis (e.g., reference or fixed layer) and the magnetic vector of the other layer can be switched between first and second opposite directions along the easy axis (e.g., storage layer). As such, the magnetic vectors in the layers can be oriented parallel or antiparallel to each other. The top magnetic layer with switchable magnetic vector is referred to as the storage or free layer. The free layer might consist of two or more sub-layers that are coupled magnetically.
The direction of the vector in the storage layer can be switched by the application of a magnetic field generated by passing a current through one or both conductors. Depending on the magnetic field generated, the magnetic vector in the second layer either switches direction or remains the same. The magnetic element would have a first or second resistance value based on whether the magnetic vectors are oriented parallel or anti-parallel, representing a first or a second logic state being stored. For example, the magnetic element will have a high resistance value when the vectors of the layer are antiparallel to represent a logic 1 or a low resistance when the vectors are parallel to represent a logic 0. The states stored in the element can be read by passing a sense current through the element and sensing the difference between the resistances.
The magnitude of the magnetic field used to switch the magnetic vector is proportional to the magnitude of the current through the conductor. To reduce power consumption, it is desirable to increase the field per current ratio of the conductor. One conventional technique of increasing the field per current ratio is to provide a magnetic liner for conductors. Magnetic liners for conductors are described in, for example, Naji et al., “A low power 1 Mbit MRAM based on ITIMTJ bit cell integrated with Copper Interconnects,” VLSI Conf. (2002)”, and M. Durlam, P. Naji et al., “A low power 1 Mbit MRAM based on ITIMTJ bit cell integrated with Copper Interconnects,” VLSI conference (2002).
U-shaped field keepers or ferromagnetic liners are known to increase the current induced magnetic switching field applied to magnetic elements sitting on top of a metal line containing such a ferromagnetic liner. Power consumption and chip size may thus be reduced as less current is needed to generate a given switching field; switches can thus be made smaller. Since for small magnetic elements (˜100 nm) it is expected that the switching fields will go up the switches will consume a significant amount of the chip area.
Ferromagnetic liners are typically made by wrapping a U-shaped (or up-side down U-shaped for the line above the TJ) ferromagnetic material around the metal line. The magnetization of the ferromagnetic liner material is along the long axis of the metal line, thus creating poles on both ends. It has been shown that at such poles the fringing field is of the order of 50 to 300 Gauss. The magnetic cells should thus be some distance from the line ends in order not to shift the switching point of the cells. A safe distance of about several micrometers can be calculated such a distance results in significant limitations of the chip layout since the arrays in memory chips should be packed as densely as possible.
Depending on current direction, ferromagnetic liners may also show a hysteresis effect. The fields for switching of the ferromagnetic liner magnetization direction are normally much higher than the fields for magnetic elements. There can be domain effects in a ferromagnetic liner, however, which allow a partially local switching of the ferromagnetic liner when a current is passed through the line. This partial switching broadens the switching field distribution for the magnetic elements and therefore significantly reduces the write margin.
The fringing fields and hystereses effects associated with a ferromagnetic liner thus limit the use of the ferromagnetic liner in a memory chip having tight element spacing and thousands of elements in a sub-array.